Join the leading chiplet startup! As an Eliyan Digital Design Engineer, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will be defining, implementing, and ensuring correctness of novel RTL for a 100mm+ 3/4/5nm FinFET SoC. You will work with a cross-functional team of industry experts that operate from first principles, innovate and push the envelope to create high-volume and high-performance manufacturable products. We offer a fun work environment with excellent benefits.
Key Responsibilities:
- Define microarchitecture and design of SoC and major blocks
- Author microarchitecture document and review with key staff
- Write RTL that meets specs
- Work with the physical design team to ensure best-in-class PPA
- Work with the verification team to create a verification plan, review assertions and checkers, stimulus, and coverage metrics
- Driving team to aggressive milestones
Minimum Qualifications:
- Expertise in general logic design, and best-in-class RTL coding methods
- Knowledge of memory systems (DDR, LPDDR, GDDR, HBM)
- Knowledge of CHI/AXI and NoC technologies
- General knowledge of RTL simulation tools and related scripting languages
- BS EE or equivalent, with 10+ years of experience
- Ability to bring high energy to an extended team
Ideal Qualifications:
- Deep expertise in memory system and memory controller design, specifically HBM3/4
- Knowledge of UPF and power-aware designs
- Experience working with and integrating DRAM PHYs
- Full understanding of fundamentals of power consumption and physical design tech
- MS/PhD EE or equivalent, with 7 years+
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