DFT Engineer:
Exp: 4 to 15 Yrs
Mode: Hybrid
Locations: INDIA.
Implementation tools like Mentor Tessent Fastscan, Testkompress or Synopsys DFT compiler and Tetramax
Sound knowledge of ATPG/Scan, coverage analysis, EDT compression etc.,
Memory BIST implementation and verification
Sound debug skills to debug simulation failures at RTL-level and gate-level
Exposure to Static timing in DFT modes to debug constraint issues and review/analyze timing reports.