ASIC RTL Design Engineer/Lead
Job Location : BLR, HYD, AHM, NOIDA, CHENNAI
Work From Office (No Work from Home)
Roles and Responsibilities :
- 4 - 9 years of ASIC RTL Design experience
- Experience in RTL design
- Verilog/VHDL
- Simulation tools, Modeslim/VCS etc.
- Basic protocols, I2C, UART, PCIe, SPI etc.
- Micro-Architecture experience is a plus
- CDC/Lint tools
- Timing analysys
- CDC design
- ISO26262 is plus
- SOC integration
